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High data rate FPGA proven Image Processing IP core

The Image 2D-FIR Filtering IP core provided by UTS are FPGA proven high data rate Image processing IP solution. These IP cores can meet high speed image and video processing applications on FPGA’s.
UTS offers IPs under flexible licensing models, to meet requirements of different category of users. The low cost reference designs are distinguished from IPs with less (or no) document (end user/project) execution for licensing.  Read more from IP main page.

UTS offers transparent and pre-committed pricing model for a minimum period of five years from the date of order  to migrate from per product based licensing to unlimited licensing or source code licensing models. With this the system developers have clear estimate of the cost in the volume production, right at the time of prototype development.

IP based on user specification

UTS also takes up development of complex algorithms based on the end performance specifications as per user requirements. In certain fields UTS also takes up this development on No cost - No commitment (NCNC) model. Based on the project category the UTS share on IP rights can be worked out for mutual benefit.

Refer to the links given for obtaining information of different IPs. Request for more information or demo  by emailing to ewip[at the rate]unistring.com

Unifying Software & Hardware
Image 2D Filtering - IP core


Contact us with your specifications for obtaining quote specific to your requirements.
Image processing
Video processing
Satellite applications
Key features
Architecture & Core description
Ordering information (P/N)
Area, Speed and Through put bench marks for Xilinix FPGAs
Tested on all Xilinx Spartan and vertex device FPGAs
High frequency of operation 50MHZ
Filter size(8 tap filter)
Area Optimized design (resource utilization benchmarks are given bellow)
Run time user loadable filter coefficients for pulse shaping
FIFO interface to Soft processor (microblaze) or Hard processor (ARM9 of Zynq)
Licensing terms
Block diagram
Other Required / Related IPs
   IP     Resource utiilztion
Wide band DDC  
Ethernet .
Contact UTS vlsi division for more details
   IP and configuration     Resource utiliztion Resource utiliztion

Suitable usage
Used/available= %
Used/available= %
Block RAM’S
99/18224 - 0%
9/32 - 28%
Image processing application
Image-2D-filtering Device:Vertex-6
99/301440 - 0%
9/768 - 1%
Image processing application