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The rate conversion filters are essential for carrying out multirate signal processing on FPGAs/ASICs. The rate conversion filters can be divided into  two categories. They are integer rate conversion and fractional rate conversion filters.

The integer rate conversion filters can change the sample rate by integer. For example decimator by 2, generates 1 output sample for every 2 input samples. Similarly interpolator can upconvert the input sample rate to higher output sample rate. The integer rate conversion filters are useful in achieving optimal sampling rates based on the required bandwidth of interest in the signal. Refer to following IP pages for integer rate conversion requirements.

        (a) Wide band Digital Down Converter
        (b) Wide band Digital Up Converter
        (c) Narrow band Digital Up Converter
        (d) Narrow band Digital Down Converter
        (e) Ultra Wide Band Digital Up Converter
        (f)  Ultra Wide Band Digital Down Converter

The fractional rate conversion (FRC) is requirement to achieve a precise sampling against a characteristic of input digital signal. For example in digital demodulator architecture for acheiving a specific samples per input symbol, the FRC is required. In several applications the FRC with dynamically configurable rate conversion factor is key requirement. The UTS Fractional resampler IP core provides all necessary options for using in high speed resampling applications. The performance of the this FRC offered by UTS, is comparable to industry popular GC-4016, GC-5016 ASICs of Texas Instruments. In addition UTS IP core provides several run time controls, to make it suitable for single chip software defined radio and cognitive radio applications (SOC implementation).
UTS offers IPs under flexible licensing models, to meet requirements of different category of users. The low cost reference designs are distinguished from IPs with less (or no) document (end user/project) execution for licensing.  Read more from IP main page.

UTS offers transparent and pre-committed pricing model for a minimum period of five years from the date of order  to migrate from per product based licensing to unlimited licensing or source code licensing models. With this the system developers have clear estimate of the cost in the volume production, right at the time of prototype development.

IP based on user specification

UTS also takes up development of complex algorithms based on the end performance specifications as per user requirements. In certain fields UTS also takes up this development on No cost - No commitment (NCNC) model. Based on the project category the UTS share on IP rights can be worked out for mutual benefit.

Refer to the links given for obtaining information of different IPs. Request for more information or demo  by emailing to ewip[at the rate]unistring.com
Unifying Software & Hardware
Ultra Wideband DDC - IP core


Contact us with your specifications for obtaining quote specific to your requirements.
Timing receovery in digital demodulators
Interfacing to ADCs and DACs with other signal processing modules running asynchronously
Bit synchronizers in telemetry
Digital filters with run time configurable cut-off frequencies
Test equpiment - Vector signal Analysis
Key features
Ordering information (P/N)
Tested on all Xilinx 5,6,7 device FPGAs
Run time configurable rate conversion factor.
Resolution of rate conversion is 0.000015 (1/65536) of input clock
Multiple architectural variants to meet any rate conversion requirement (streaming with respect input/output clock)
Area Optimized design( contact us for resource utilization benchmarks)
Can be Interfaced to other UTS IPs for realizing high speed demodulators
Clock speeds upto 200 MHz
Can be ported to Altera FPGAs.
Licensing terms
Other Required / Related IPs


Wide band DDC When the input is from ADC (real signal), then DDC will be required to down convert to complex base band signal.
Channelizer For Frequency division multiplexed signals the channelizer can extract each channel samples.
TDM  decoders/ deframmers In telemetry applications after doing bit synchronization using Fractional resampler the demultiplexers can extract each channel data.
Contact us ewip@unistring.com for more details